New PDF release: Cryptographic Hardware and Embedded Systems — CHES 2001:

By Ross Anderson (auth.), Çetin K. Koç, David Naccache, Christof Paar (eds.)

ISBN-10: 3540425217

ISBN-13: 9783540425212

ISBN-10: 3540447091

ISBN-13: 9783540447092

These are the court cases of CHES 2001, the 3rd Workshop on Cryptographic and Embedded structures. The ?rst CHES Workshops have been held in Massachusetts, and this used to be the ?rst Workshop to be held in Europe. there has been various submissions this yr, and in reaction the technical software was once prolonged to two 0.5 days. As is clear by means of the papers in those lawsuits, many fantastic submissions have been made. identifying the papers for this year’s CHES was once now not a simple activity, and weregretthatwehadtorejectseveralveryinterstingpapersduetotheac l kof time. there have been sixty six submitted contributions this yr, of which 31, or 47%, have been chosen for presentation. If we glance on the variety of submitted papers at CHES ’99 (42 papers) and CHES 2001 (51 papers), we detect a gradual elevate. We interpret this as a continual desire for a workshop sequence which mixes thought and perform for integrating robust safety features into smooth communications and computing device purposes. as well as the submitted contributions, Ross Anderson from Cambridge collage, united kingdom, and Adi Shamir from The Weizmann Institute, Israel, gave invited talks. As in past years, the focal point of the workshop is on all facets of cryp- graphichardwareandembeddedsystemdesign.Ofspecialinterestwerecont- butions that describe new tools for e?cient implementations and high-speed software program for embedded platforms, e.g., shrewdpermanent playing cards, microprocessors, DSPs, and so forth. CHES additionally is still an immense discussion board for brand spanking new theoretical andpractical?ndingsintheimportantandgrowing?eldofside-channelattacks.

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Extra resources for Cryptographic Hardware and Embedded Systems — CHES 2001: Third International Workshop Paris, France, May 14–16, 2001 Proceedings

Example text

In all the following, we will suppose that n is a power of two. In this case, H2n has order 2n−1 [5]. A set of generators of H2n can be constructed recursively as follows. Consider the set {0, . . , n − 1}, and 20 E. Brier, H. Handschuh, and C. Tymen the permutation g ∈ H2n which exchanges {0, . . , n/2 − 1} with {n/2, . . , n − 1} by i ↔ i + n/2. Now, we can repeat inductively this procedure by considering the sets {0, . . , n/2 − 1} and {n/2, . . , n − 1}. We get finally n − 1 elements of Sn which generate H2n .

Consider the keyed Fast Primitives for Internal Data Scrambling in Tamper Resistant Hardware 21 permutation (K1 , K2 ) → hK1 βgK2 , where hK1 runs over H, gK2 runs over H232 , and where β is a fixed permutation. This map is injective iff βHβ −1 ∩ H232 = {ι} . (2) A simple method to find such a β is first to solve (1) for n = 16, and then to set β = (ρ(·), ρ(· − 16) + 16). This search terminates on average after (|S16 /H216 | · |H216 |)1/2 ≈ 222 trials. For instance, the following permutation is a solution of (1) for n = 16: ρ = (0, 15, 9, 10, 11, 12, 13, 14)(1, 2, 3)(4, 5, 6, 7, 8) .

From this set we select an instruction at random. Given a random number generator, which will normally be constructed from a pseudo random number generator that is reseeded regularly with some entropy, we select one of the executable instructions and schedule it for execution. 1 Random Register Renaming Basic Register Renaming Register renaming is a common technique used to improve the performance of processors. Renaming works by defining a set of virtual register identifiers (which are used in the instruction set of the processors) and a set of physical registers (which are used in the execution unit).

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Cryptographic Hardware and Embedded Systems — CHES 2001: Third International Workshop Paris, France, May 14–16, 2001 Proceedings by Ross Anderson (auth.), Çetin K. Koç, David Naccache, Christof Paar (eds.)

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