Download PDF by William Greig: Integrated circuit packaging, assembly, and interconnections

By William Greig

ISBN-10: 0387281533

ISBN-13: 9780387281537

ISBN-10: 0387339132

ISBN-13: 9780387339139

Reviewing some of the IC packaging, meeting, and interconnection applied sciences, this expert consultant and reference offers an outline of the fabrics and the procedures, in addition to the traits and on hand thoughts, that surround digital production. It covers either the technical concerns and touches on many of the reliability matters with a few of the applied sciences appropriate to packaging and meeting of the IC.

The concentration is at the digital production technique, which in its least difficult shape consists of meeting of the IC right into a package deal or interconnect substrate or board. The ebook discusses many of the packaging techniques to be had, particularly, unmarried chip, multichip, and Chip On Board; the meeting ideas, chip & twine, tape computerized bonding, and turn chip; and the basic excessive density package/substrate production applied sciences, skinny movie, thick movie, cofired ceramic, and laminate revealed wiring board (PWB) tactics. incorporated is also a dialogue of excessive density PWBs utilizing construct up/sequential processes.

Integrated Circuit Packaging, meeting and Interconnections is an advent, a evaluate and an replace of packaging technologies.

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Extra info for Integrated circuit packaging, assembly, and interconnections

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Unfortunately, with the finer pitch packages, the assembly and the attachment to the PWB became increasingly more difficult. Alignment and placement problems became more demanding, as did the stencil printing of the solder paste. In addition, the very fine pitch packages often experienced leads shorting because of the reduced spacing between the leads. And of course the problem of maintaining planarity of the leads was magnified, making handling of the packages more difficult. 2 — Area Array Packages—PGA, BGA Use of peripheral pads with increasing I/O count unfortunately meant larger packages This brought about another paradigm shift in package I/O format from the traditional peripheral to an area array layout that allowed pads to be placed within the body (bottom surface) of the package (Figure 3-6).

Ceramic BGA Configurations Ceramic BGAs can be supplied with solder bumps or solder columns (typically high lead 5Sn95Pb) as shown in Figure 3-10. The solder column provides for increased gap between the package and the substrate and greater solder volume. 0) reliability. (Courtesy IBM) Figure 3-10. 2 — The Plastic Ball Grid Array, PBGA Increased IC I/O count is the result of increased device functionality, which in turn means more complex packages with higher wiring density within the package.

1 — Impact of I/O Count at Chip Level An increase in number of I/O pads, the result of increased functionality, requires a significant change in the physical layout of the IC. Accommodating I/O count means changes in the IC’s I/O pad size, pitch and overall format. Traditionally, I/O pads have been positioned along the perimeter of the chip, 100 micrometers square on 200-micrometer pitch. This peripheral format has always been ideal for chip and wire assembly and as a result a huge infrastructure to support this technology is currently in place.

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Integrated circuit packaging, assembly, and interconnections by William Greig


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